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FS32K112BHTXWLLTR датащи(PDF) 72 Page - NXP Semiconductors

номер детали FS32K112BHTXWLLTR
подробное описание детали  Low-power Arm Cortex-M4F/M0 core with excellent energy efficiency
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FS32K112BHTXWLLTR датащи(HTML) 72 Page - NXP Semiconductors

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For supported baud rate see section 'Chip-specific LPI2C information' of the Reference
Manual.
6.5.4 FlexCAN electical specifications
For supported baud rate, see section 'Protocol timing' of the Reference Manual.
6.5.5 SAI electrical specifications
The following table describes the SAI electrical characteristics.
• Measurements are with maximum output load of 50 pF, input transition of 1 ns and
pad configured with fastest slew settings (DSE = 1'b1).
• I/O operating voltage ranges from 2.97 V to 3.6 V
• While doing the mode transition (RUN -> HSRUN or HSRUN -> RUN ), the
interface should be OFF.
Table 47. Master mode timing specifications
Symbol
Description
Min.
Max.
Unit
—
Operating voltage
2.97
3.6
V
S1
SAI_MCLK cycle time
40
—
ns
S2
SAI_MCLK pulse width high/low
45%
55%
MCLK period
S3
SAI_BCLK cycle time
80
—
ns
S4
SAI_BCLK pulse width high/low
45%
55%
BCLK period
S5
SAI_RXD input setup before
SAI_BCLK
28
—
ns
S6
SAI_RXD input hold after
SAI_BCLK
0
—
ns
S7
SAI_BCLK to SAI_TXD output
valid
—
8
ns
S8
SAI_BCLK to SAI_TXD output
invalid
-2
—
ns
S9
SAI_FS input setup before
SAI_BCLK
28
—
ns
S10
SAI_FS input hold after
SAI_BCLK
0
—
ns
S11
SAI_BCLK to SAI_FS output
valid
—
8
ns
S12
SAI_BCLK to SAI_FS output
invalid
-2
—
ns
Communication modules
S32K1xx Data Sheet, Rev. 12, 02/2020
72
NXP Semiconductors



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