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PMS152 датащи(PDF) 68 Page - PADAUK Technology.

номер детали PMS152
подробное описание детали  8bit OTP Type SuLED IO Controller
PDF  91 Pages
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производитель  PADAUK [PADAUK Technology.]
домашняя страница  http://www.padauk.com.tw/
Logo PADAUK - PADAUK Technology.

PMS152 датащи(HTML) 68 Page - PADAUK Technology.

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PMS152
8bit OTP Type SuLED IO Controller
©Copyright 2020, PADAUK Technology Co. Ltd
Page 68 of 91
PDK-DS-PMS152-EN_V105 –Jun. 9, 2020
6.25. PWMG Clock Register (pwmgclk), IO address = 0x21
Bit
Reset
R/W
Description
7
0
WO
PWMG Disable/ Enable
0: PWMG Disable
1: PWMG Enable
6 - 4
000
WO
PWMG clock pre-scalar.
000: ÷1
001: ÷2
010: ÷4
011: ÷8
100: ÷16
101: ÷32
110: ÷64
111: ÷128
3 - 1
-
-
Reserved
0
0
WO
PWMG clock source selection
0: System Clock
1: IHRC or IHRC*2 (by code option PWM_Source)
6.26. PWMG0 Duty Value High Register (pwmg0dth), IO address = 0x22
Bit
Reset
R/W
Description
7 - 0
-
WO
Bit[10:3] of PWMG0 Duty.
6.27. PWMG0 Duty Value Low Register (pwmg0dtl), IO address = 0x23
Bit
Reset
R/W
Description
7 - 5
-
WO
Bit[2:0] of PWMG0 Duty.
4 - 0
-
-
Reserved
Note: It’s necessary to write PWMG0 Duty_Value Low Register before writing PWMG0 Duty_Value High Register.
6.28. PWMG Counter Upper Bound High Register (pwmgcubh ), IO address = 0x24
Bit
Reset
R/W
Description
7 - 0
-
WO
Bit[10:3] of PWMG Counter Bound.
6.29. PWMG Counter Upper Bound Low Register (pwmgcubl ), IO address = 0x25
Bit
Reset
R/W
Description
7 - 6
-
WO
Bit[2:1] of PWMG Counter Bound.
5 - 0
-
-
Reserved



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