PI74FCT16823T/162823/162H823T

18-BIT REGISTERS

2

PS2040A 03/11/96

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Pin Name

Description

xDx

xCLK

Clock Inputs

xCLKEN

Clock Enable Inputs (Active LOW)

xCLR

Asynchronous Clear Inputs (Active LOW)

xOE

Output Enable Inputs (Active LOW)

xQx

3-State Outputs

Note:

1. For the PI74FCT162H823T, these pins have “Bus

Hold.” All other pins are standard, outputs, or I/Os.

Product Pin Description

Product Pin Configuration

PI74FCT16823 Truth Table

(1)

Inputs

Outputs

Function

xOE

xCLR xCLKEN xCLK

xDx

xQx

High-Z

H

X

X

X

X

Z

Clear

L

L

X

X

X

L

Hold

L

H

H

X

X

Load

H

H

L

↑

LZ

HH

L

↑

HZ

LH

L

↑

LL

LH

L

↑

HH

1.

H = High Voltage Level

L = Low Voltage Level

X = Don’t Care

Z = High Impedance

NC = No Change

↑ = LOW-to-HIGH Transition

2.

Output level before indicated steady-state

input conditions were established.

1

CLR

1

1

OE

2

1

3

GND

4

1

5

1

6

7

1

8

1

9

1

10

GND

11

1

12

1

13

1

14

2

15

2

16

2

17

GND

18

2

19

2

20

2

21

22

2

23

2

24

1

CLK

56

1

CLKEN

55

1

54

GND

53

1

52

1

51

50

1

49

1

48

1

47

GND

46

1

45

1

44

1

43

2

42

2

41

2

40

GND

39

2

38

2

37

2

36

35

2

34

2

33

GND

25

2

26

2

OE

27

2

CLR

28

GND

32

2

31

2

CLKEN

30

2

CLK

29

56-PIN

V56

A56