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PIC16F15213 датащи(PDF) 53 Page - Microchip Technology

номер детали PIC16F15213
подробное описание детали  PIC16F15213/14/23/24/43/44 Full-Featured 8/14/20-Pin Microcontrollers
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производитель  MICROCHIP [Microchip Technology]
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PIC16F15213 датащи(HTML) 53 Page - Microchip Technology

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9.5.2
Overflow/Underflow Reset
If the STVREN bit is programmed to ‘1’, the device will be Reset if the stack is PUSHed beyond the sixteenth level or
POPed beyond the first level, setting the appropriate bits (STKOVF or STKUNF, respectively).
9.6
Indirect Addressing
The INDFn registers are not physical registers. Any instruction that accesses an INDFn register actually accesses the
register at the address specified by the File Select Registers (FSR). If the FSRn address specifies one of the two
INDFn registers, the read will return ‘0’ and the write will not occur (though Status bits may be affected). The FSRn
register value is created by the pair FSRnH and FSRnL.
The FSR registers form a 16-bit address that allows an addressing space with 65536 locations. These locations are
divided into three memory regions:
• Traditional/Banked Data Memory
• Linear Data Memory
• Program Flash Memory
Figure 9-13. Indirect Addressing PIC16F152
Filename:
10-000044F.vsd
Title:
INDIRECT ADDRESSING
Last Edit:
1/13/2017
First Used:
PIC16(L)F153XX
Note:
0x0000
PC value = 0x000
PC value = 0x7FF
0x87FF
0x0000
0x1FFF
0x2000
0X2FEF
0X2FF0
0x7FFF
0x8000
Reserved
Traditional
Data Memory
Linear
Data Memory
Program
Flash Memory
FSR
Address
Range
Rev. 10-000044F
1/13/2017
PIC16F15213/14/23/24/43/44
Memory Organization
© 2020 Microchip Technology Inc.
Preliminary Datasheet
DS40002195A-page 53



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