SN74HCS595 datasheet(13/26 Pages) TI

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9.2.1 Design Requirements

9.2.1.1 Power Considerations

Ensure the desired supply voltage is within the range specified in the Recommended Operating Conditions. The

supply voltage sets the device's electrical characteristics as described in the Electrical Characteristics.

The positive voltage supply must be capable of sourcing current equal to the total current to be sourced by all

outputs of the SN74HCS595-Q1 plus the maximum static supply current, ICC, listed in Electrical Characteristics

and any transient current required for switching. The logic device can only source as much current as is provided

by the positive supply source. Be sure not to exceed the maximum total current through VCC listed in the

Absolute Maximum Ratings.

The ground must be capable of sinking current equal to the total current to be sunk by all outputs of the

SN74HCS595-Q1 plus the maximum supply current, ICC, listed in Electrical Characteristics, and any transient

current required for switching. The logic device can only sink as much current as can be sunk into its ground

connection. Be sure not to exceed the maximum total current through GND listed in the Absolute Maximum

Ratings.

The SN74HCS595-Q1 can drive a load with a total capacitance less than or equal to 50 pF while still meeting all

of the datasheet specifications. Larger capacitive loads can be applied, however it is not recommended to

exceed 50 pF.

The SN74HCS595-Q1 can drive a load with total resistance described by RL ≥ VO / IO, with the output voltage

and current defined in the Electrical Characteristics table with VOH and VOL. When outputting in the high state,

the output voltage in the equation is defined as the difference between the measured output voltage and the

supply voltage at the VCC pin.

Total power consumption can be calculated using the information provided in CMOS Power Consumption and

Cpd Calculation.

Thermal increase can be calculated using the information provided in Thermal Characteristics of Standard Linear

and Logic (SLL) Packages and Devices.

CAUTION

The maximum junction temperature, TJ(max) listed in the Absolute Maximum Ratings, is an additional

limitation to prevent damage to the device. Do not violate any values listed in the Absolute Maximum

Ratings. These limits are provided to prevent damage to the device.

9.2.1.2 Input Considerations

Input signals must cross Vt-(min) to be considered a logic LOW, and Vt+(max) to be considered a logic HIGH. Do

not exceed the maximum input voltage range found in the Absolute Maximum Ratings.

Unused inputs must be terminated to either VCC or ground. These can be directly terminated if the input is

completely unused, or they can be connected with a pull-up or pull-down resistor if the input is to be used

sometimes, but not always. A pull-up resistor is used for a default state of HIGH, and a pull-down resistor is used

for a default state of LOW. The resistor size is limited by drive current of the controller, leakage current into the

SN74HCS595-Q1, as specified in the Electrical Characteristics, and the desired input transition rate. A 10-kΩ

resistor value is often used due to these factors.

The SN74HCS595-Q1 has no input signal transition rate requirements because it has Schmitt-trigger inputs.

Another benefit to having Schmitt-trigger inputs is the ability to reject noise. Noise with a large enough amplitude

can still cause issues. To know how much noise is too much, please refer to the ΔVT(min) in the Electrical

Characteristics. This hysteresis value will provide the peak-to-peak limit.

Unlike what happens with standard CMOS inputs, Schmitt-trigger inputs can be held at any valid value without

causing huge increases in power consumption. The typical additional current caused by holding an input at a

value other than VCC or ground is plotted in the Typical Characteristics.

Refer to the Feature Description section for additional information regarding the inputs for this device.

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SN74HCS595-Q1

SCLS785B – DECEMBER 2019 – REVISED AUGUST 2020

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