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SN74HCS138D датащи(PDF) 13 Page - Texas Instruments

номер детали SN74HCS138D
подробное описание детали  SN74HCS138 3- to 8-Line Decoder/Demultiplexer with Schmitt-Trigger Inputs
PDF  19 Pages
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SN74HCS138D датащи(HTML) 13 Page - Texas Instruments

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3. Ensure the resistive load at the output is larger than (VCC / IO(max)) Ω. This will ensure that the maximum
output current from the Absolute Maximum Ratings is not violated. Most CMOS inputs have a resistive load
measured in megaohms; much larger than the minimum calculated above.
4. Thermal issues are rarely a concern for logic gates, however the power consumption and thermal increase
can be calculated using the steps provided in the application report, CMOS Power Consumption and Cpd
Calculation.
9.2.3 Application Curve
A
0
A
1
A
2
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
G
2
Figure 9-2. Application timing diagram
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SN74HCS138
SCLS832 – SEPTEMBER 2020
Copyright © 2020 Texas Instruments Incorporated
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