ASM3P2182A

X2105A

LCD Panel EMI Reduction IC

2 of 7

Notice: The information in this document is subject to change without notice.

1

2

3

4

5

6

7

8

ASM3P2182A

XIN

GND

S1

S0

ModOUT

VDD

FS0

FS1

Pin Configuration

Pin Description

Pin#

Pin Name

Type

Description

1

XIN

I

Connect to externally generated clock signal.

2

GND

P

Ground to entire chip.

3

S1

I

Spread range select. Digital logic input used to select frequency deviation

(Refer Spread Deviation Table). This pin has an internal pull-up resistor.

4

S0

I

Spread range select. Digital logic input used to select frequency deviation

(Refer Spread Deviation Table). This pin has an internal pull-up resistor.

5

MODOUT

O

Spread spectrum low EMI output.

6

VDD

P

Power supply for the entire chip (3.3V).

7

FS0

I

Frequency range select. Digital logic input used to select frequency range

(Refer Input Frequency and Modulation Rate Table). This pin has an internal

pull-up resistor.

8

FS1

I

Frequency range select. Digital logic input used to select frequency range

(Refer Input Frequency and Modulation Rate Table). This pin has an internal

pull-up resistor.

Input Frequency and Modulation Rate Table

FS1 (pin 8)

FS0 (pin 7)

Frequency Range

0

0

25MHz to 50MHz

0

1

50MHz to 103 MHz

1

0

75MHz to 150MHz

1

1

160MHz to 210MHz

Spread Deviation Selection Table

S1 (pin 3)

S0 (pin 4)

Spread Deviation (%)

0

0

± 0.13

0

1

± 0.41

1

0

± 0.66

1

1

± 1.24