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IS25LP064A-RFLA2 датащи(PDF) 51 Page - Integrated Silicon Solution, Inc |
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IS25LP064A-RFLA2 датащи(HTML) 51 Page - Integrated Silicon Solution, Inc |
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51 / 99 page ![]() IS25LP064A/032A Integrated Silicon Solution, Inc.- www.issi.com 51 Rev. A 11/06/2015 8.19 WRITE FUNCTION REGISTER OPERATION (WRFR, 42h) The Write Function Register (WRFR) instruction allows the user to change from top block area (default) to bottom block area by setting TBS bit to “1”. Also Information Row Lock bits (IRL3~IRL0 ) can be set to “1” individually by WRFR instruction in order to lock Information Row. Since TBS bit and IRL bits are OTP, once it is set to “1”, it cannot be set back to “0” again. Figure 8.32 Write Function Register Sequence Instruction = 42h CE # SCK SI SO Data In 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Mode 3 Mode 0 7 3 2 1 0 6 5 4 High Impedence Figure 8.33 Write Function Register QPI Sequence 42h 0 1 Mode 3 Mode 0 2 3 7:4 3:0 CE# SCK IO[3:0] Data In |
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