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IS25LP064A-RBLA2 датащи(PDF) 49 Page - Integrated Silicon Solution, Inc

номер детали IS25LP064A-RBLA2
подробное описание детали  3V SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  99 Pages
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производитель  ISSI [Integrated Silicon Solution, Inc]
домашняя страница  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP064A-RBLA2 датащи(HTML) 49 Page - Integrated Silicon Solution, Inc

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IS25LP064A/032A
Integrated Silicon Solution, Inc.- www.issi.com
49
Rev. A
11/06/2015
8.17 WRITE STATUS REGISTER OPERATION (WRSR, 01h)
The Write Status Register (WRSR) instruction allows the user to enable or disable the block protection and
Status Reg
ister write protection features by writing “0”s or “1”s into the non-volatile BP3, BP2, BP1, BP0, and
SRWD bits.
Also WRSR instruction allows the user to disable or enable quad operation by writing “0” or “1” into
the non-volatile QE bit.
Figure 8.28 Write Status Register Sequence
Instruction = 01h
CE #
SCK
SI
SO
Data In
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Mode 3
Mode 0
7
3
2
1
0
6
5
4
High Impedence
Figure 8.29 Write Status Register QPI Sequence
01h
0
1
Mode 3
Mode 0
2
3
7:4
3:0
CE#
SCK
IO[3:0]
Data In



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