AS7C3256A-10JC datasheet(4/9 Pages) ALSC

номер детали	AS7C3256A-10JC

подробное описание детали	3.3V 32K X 8 CMOS SRAM (Common I/O)

PDF	9 Pages

Scroll/Zoom	100%

производитель	ALSC [Alliance Semiconductor Corporation]

домашняя страница	https://www.alliancememory.com

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4 / 9 page

AS7C3256A

4/23/04; v.2.0

Alliance Semiconductor

P. 4 of 9

Read cycle (over the operating range)3,9

Key to switching waveforms

Read waveform 1 (address controlled)3,6,7,9

Read waveform 2 (CE controlled)3,6,8,9

Parameter

Symbol

-10

-12

-15

-20

Unit Notes

Min

Max

Min

Max

Min

Max

Min

Max

Read cycle time

tRC

–12–15–

–

Address access time

tAA

–

Chip enable (CE) access time

tACE

–

Output enable (OE) access time

tOE

–5–6–7–

Output hold from address change

tOH

3–3–3–3

–

CE LOW to output in low Z

tCLZ

3–3–3–3

–

4, 5

CE HIGH to output in high Z

tCHZ

–3–3–4–

4, 5

OE LOW to output in low Z

tOLZ

0–0–0–0

–

4, 5

OE HIGH to output in high Z

tOHZ

–3–3–4–

4, 5

Power up time

tPU

0–0–0–0

–

4, 5

Power down time

tPD

–

4, 5

Undefined output/don’t care

Falling input

Rising input

Address

Dout

Data valid

tOH

tAA

tRC

Supply

current

Dout

tRC1

tOE

tOLZ

tACE

tCHZ

tCLZ

tPU

tPD

ICC

ISB

50%

tOHZ

Data valid

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