L6997STR datasheet(6/30 Pages) STMICROELECTRONICS

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L6997S

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DEVICE DESCRIPTION

4.1 Constant On Time PWM topology

Figure 5. Loop block schematic diagram

The device implements a Constant On Time control scheme, where the Ton is the high side MOSFET on time

duration forced by the one-shot generator. The On Time is directly proportional to VSENSE pin voltage and in-

verse to OSC pin voltage as in Eq1:

(1)

where KOSC = 180ns and τ is the internal propagation delay time (typ. 40ns). The system imposes in steady

state a minimum On Time corresponding to VOSC = 1V. In fact if the VOSC voltage increases above 1V the cor-

responding Ton will not decrease. Connecting the OSC pin to a voltage partition from VIN to GND, it allows a

steady-state switching frequency FSW independent of VIN. It results:

(2)

where

(3)

(4)

The above equations allow setting the frequency divider ratio

αOSC once output voltage has been set; note

that such equations hold only if VOSC<1V. Further the Eq2 shows how the system has a switching frequen-

cy ideally independent from the input voltage. The delay introduces a light dependence from VIN. A mini-

mum Off-Time constraint of about 500ns is introduced in order to assure the boot capacitor charge and to

Vsense

Vout

Vin

HGATE

LGATE

OSC

Vref

PWM comparator

FFSR

One-shot generator

OSC

SENSE

OSC

----------------------

OUT

---------------

-----------

OSC

OUT

---------------

OSC

---------------

OSC

→

SW KOSC αOUT

OSC

---------------

--------------------

OUT

---------------

--------------------

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