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Advanced CMOS TTL Input – 74ACT240

Rev 1.0

24/04/19

7. Not production tested in die form, characterized by chip design and tested in package.

Figure 2 – Propagation Delay - Output Enable to Output 1Y or 2Y

Figure 1 – Propagation Delay - Input 1A or 2A to Output 1Y or 2Y

PARAMETER

SYMBOL

CONDITIONS

TYPICAL

UNITS

Maximum Input

Capacitance

5.0V

4.5

pF

Power Dissipation

Capacitance

(Per Buffer/Driver)

5.0V

F = 1MHz

45

pF

Switching Waveforms