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AX6800X датащи(PDF) 46 Page - ASIX Electronics Corporation |
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AX6800X датащи(HTML) 46 Page - ASIX Electronics Corporation |
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46 / 57 page ![]() 46 AX6800x 2/4-Port USB KVM Switch SoC Copyright © 2015 ASIX Electronics Corporation. All rights reserved. 4.5 AC Timing Characteristics 4.5.1 Clock Input Timing Specification Symbol Parameter Min Typ Max Units - Nominal Frequency - 12 - MHz - Frequency Stability -50 - +50 ppm CL Crystal Load Capacitance - 12.5 - pF 4.5.2 Timer 0/1/2 Interface Timing Symbol Description Min Typ Max Units Tck_hi TM_CK[2:0] high pulse width 2 - - Tsys_clk Tck_low TM_CK[2:0] low pulse width 2 - - Tsys_clk Tck_fal TM_CK[2:0] falling-edge internal detection time 1 ~ 2 - 2 Tsys_clk Figure 4-3: TM_CK[2:0] Timing Diagram and Table Symbol Description Min Typ Max Units Tgt_hi TM_GT[2:0] high pulse width 2 - - Tsys_clk Tgt_low TM_GT[2:0] low pulse width 2 - - Tsys_clk Tgt_fal TM_GT[2:0] falling-edge internal detection time 1 ~ 2 - 2 Tsys_clk Tgt_dly TM_GT[2:0] internally retimed delay 0.5 - 1 Tsys_clk Figure 4-4: TM_GT[2:0] Timing Diagram and Table Tck_fal Tck_low Tck_hi Tck_low Tck_hi TM_CK[2:0] internal sys_clk TM_CK[2:0] falling-edge detected internally T gt_dl y T gt_fal T gt_low T gt_hi T gt_low T gt_hi T M_GT [2:0] internal sys_clk T M_GT [2:0] falling-edge detected internally internally retimed T M_GT [2:0] |
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