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OPA607 датащи(PDF) 18 Page - Texas Instruments

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номер детали OPA607
подробное описание детали  OPAX607 50-MHz, Low-Power, Gain of 6-V/V Stable, Rail-to-Rail Output CMOS Operational Amplifier
PDF  28 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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OPA607 датащи(HTML) 18 Page - Texas Instruments

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V-
OUTPUT
GND
GND
GND
18
OPAX607
SBOS981B – OCTOBER 2019 – REVISED FEBRUARY 2020
www.ti.com
Product Folder Links: OPAX607
Submit Documentation Feedback
Copyright © 2019–2020, Texas Instruments Incorporated
10 Power Supply Recommendations
The OPAX607 is specified for operation from 2.2 V to 5.5 V (±1.1 V to ±2.75 V), applicable from –40°C to
+125°C. Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy
or high-impedance power supplies.
CAUTION
Supply voltages larger than 6 V can permanently damage the device (see the Absolute
Maximum Ratings table).
For more detailed information on bypass capacitor placement, see the Layout Guidelines section.
11 Layout
11.1 Layout Guidelines
For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:
•
Noise can propagate into analog circuitry through the power-supply pins of the circuit as a whole and of
the operational amplifier. Bypass capacitors are used to reduce the coupled noise by providing low-
impedance power sources local to the analog circuitry.
–
Connect low-equivalent series resistance (ESR), 0.1-µF ceramic bypass capacitors between each
supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+
to ground is applicable for single-supply applications.
•
Separate grounding for analog and digital portions of the circuitry is one of the simplest and most
effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to
ground planes. A ground plane helps distribute heat and reduces electromagnetic interference (EMI)
noise pickup. Make sure to physically separate digital and analog grounds, paying attention to the flow of
the ground current.
•
To reduce parasitic coupling, run the input traces as far away from the supply or output traces as
possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicularly is much
better than crossing in parallel with the noisy trace.
•
Place the external components as close to the device as possible. Keeping RF and RG close to the
inverting input minimizes parasitic capacitance; see Figure 12 and Figure 13.
•
Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
•
Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly
reduce leakage currents from nearby traces that are at different potentials.
11.2 Layout Examples
Figure 12. Operational Amplifier Board Layout for a Noninverting Configuration



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