EL5285CS datasheet(9/9 Pages) INTERSIL

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These two methods will generate hysteresis of up to a few

hundred millivolts. Beyond that, the impedance of R3 is low

enough to affect the bias string and adjustment of R1 may be

required.

Power Dissipation

When switching at high speeds, the comparator's drive

capability is limited by the rise in junction temperature

caused by the internal power dissipation. For reliable

operation, the junction temperature must be kept below

TJMAX (125°C).

An approximate equation for the device power dissipation is

as follows. Assume the power dissipation in the load is very

small:

where:

VS is the analog supply voltage from VS+ to VS-

IS is the analog quiescent supply current per comparator

VSD is the digital supply voltage from VSD to ground

ISD is the digital supply current per comparator

N is the number of comparators in the package

ISD strongly depends on the input switching frequency.

Please refer to the performance curve to choose the input

driving frequency. Having obtained the power dissipation, the

maximum junction temperature can be determined as

follows:

where:

TMAX is the maximum ambient temperature

θJA is the thermal resistance of the package

Threshold Detector

The inverting input is connected to a reference voltage and

the non-inverting input is connected to the input. As the input

passes the VREF threshold, the comparator's output

changes state. The non-inverting and inverting inputs may

be reversed.

Crystal Oscillator

A simple crystal oscillator using one comparator of an

EL5285 is shown below. The resistors R1 and R2 set the

bias point at the comparator's non-inverting input. Resistors

R3, R4, and C1 set the inverting input node at an appropriate

DC average voltage based on the output. The crystal's path

provides resonant positive feedback and stable oscillation

occurs. Although the EL5285 will give the correct logic

output when an input is outside the common mode range,

additional delays may occur when it is so operated.

Therefore, the DC bias voltages at the inputs are set about

500mV below the center of the common mode range and the

200

Ω resistor attenuates the feedback to the non-inverting

input. The circuit will operate with most AT-cut crystal from

1MHz to 8MHz over a 2V to 7V supply range. The output

duty cycle for this circuit is roughly 50% at 5V VCC, but it is

affected by the tolerances of the resistors. The duty cycle

can be adjusted by changing VCC value.

DISS

SD )

(

JMAX

MAX

DISS

VIN

VREF

VOUT

200

Ω

VOUT

1MHz to

8MHz

Ω

0.01µF

Ω

1.5k

Ω

EL5285

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