© 2004 Fairchild Semiconductor Corporation

DS009485

www.fairchildsemi.com

April 1988

Revised January 2004

74F162A

Synchronous Presettable BCD Decade Counter

General Description

The 74F162A is a high-speed synchronous decade counter

operating in the BCD (8421) sequence. They are synchro-

nously presettable for applications in programmable divid-

ers. The F162A has a Synchronous Reset input that

overrides counting and parallel loading and allows all out-

puts to be simultaneously reset on the rising edge of the

clock. The F162A is a high speed version of the F162.

Features

s Synchronous counting and loading

s High-speed synchronous expansion

s Typical count rate of 120 MHz

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

74F162A

Logic Symbols

74F162A

74F162A

Order Number

Package Number

Package Description

74F162ASC

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74F162APC

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide