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Up/Down Adjust Resistance Calculation

RU or RD +

499

D% *

99.8 kW

(2)

Cout

+

Cin

VIN

GND

MargDn

Q2

+VOUT

Q1

+

MargUp

RD

RU

PT H12010W

( T op V iew)

1

2

10

9

8

7

6

5

4

3

GND

RSET

0.1 W, 1 %

0 V

L

O

A

D

PTH12020W/L

SLTS208E–MAY 2003–REVISED OCTOBER 2005

low-leakage open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this

NOTES:

1. The Margin Up and Margin Dn controls were not intended to be activated simultaneously. If they are their

affects on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error in

the output voltage set point.

2. The ground reference should be a direct connection to the module GND at pin 7 (pin 1 for the PTHxx050).

be located close to the regulator.

3. The Margin Up and Margin Dn control inputs are not compatible with devices that source voltage. This

includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device

(preferably a discrete MOSFET transistor). The device selected should have low off-state leakage current.

Each input sources 8 µA when grounded, and has an open-circuit voltage of 0.8 V.

Where ∆% = The desired amount of margin adjust in percent.

Table 6. Margin Up/Down Resistor Values

% Adjust

50.0 kΩ

4

24.9 kΩ

3

66.5 kΩ

2

150.0 kΩ

1

397.0 kΩ

Figure 19. Margin Up/Down Application Schematic

19