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ISL88694 датащи(PDF) 5 Page - Intersil Corporation |
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ISL88694 датащи(HTML) 5 Page - Intersil Corporation |
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5 / 7 page ![]() 5 FN8239.1 January 21, 2005 Functional Description SMBus Overview The SMBus or I2C bus is a 2-wire multimaster bus, meaning that more than one device connected to the bus is capable of controlling it. Master devices communicate to other master or slave devices using one clock and one data line. These are both bidirectional. In order to allow multimaster operation without bus contention, it is necessary to allow each bus to be connected to a positive supply voltage via a current-source or pull-up resistor (see “System Diagram” on page 2). When the bus is free, both lines are HIGH. The output stages of devices connected to the bus must have an open-drain or open- collector to perform the wired-AND function. Simple pull-up resistors on the clock and data lines work well unless there are long signal lines or many devices connected to the bus. Then, the combined capacitance of the bus increases the rise time on the signal to such an extent that the communication becomes unreliable or fails to meet the bus timing specifications. Smaller resistors can sometimes compensate for the extra capacitance, but this increases the current consumption when the signal lines are pulled LOW. FIGURE 5. VTRIPH VOLTAGE FIGURE 6. IDD CURRENT. SMBus1=SMBus2=OPEN. FIGURE 7. BOOST PULL-UP CURRENT vs. SMBus VOLTAGE Typical Performance Curves (Continued) 0.50 0.55 0.60 0.65 0.70 0.45 0.40 0.35 0.30 -40 -20 0 204060 80 100 -60 TEMPERATURE (°C) VDD=5.5V VDD=2.7V 75 80 85 90 95 70 65 60 55 -40 -20 0 204060 80 100 -60 TEMPERATURE (°C) VDD=5.5V VDD=2.7V 2.0 2.5 3.0 3.5 1.5 1.0 0.5 0 12 34 5 0 SMBus VOLTAGE (V) 6 VDD=5.0V VDD=2.7V ISL88694 |
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