CS42L51 datasheet(39/83 Pages) CIRRUS

39 / 83 page

DS679A2

CS42L51

4.5.4

Quarter- and Half-Speed Mode

Quarter-Speed Mode (QSM) and Half-Speed Mode (HSM) allow lower sample rates while maintaining a

relatively flat noise floor in the typical audio band of 20 Hz - 20 kHz. Single-Speed Mode (SSM) will allow

lower frequency sample rates; however, the DAC's noise floor, that normally rises out-of-band, will scale

with the lower sample rate and begin to rise within the audio band. QSM and HSM corrects for most of

this scaling, effectively increasing the dynamic range of the CODEC at lower sample rates, relative to

SSM.

4.6

Digital Interface Formats

The serial port operates in standard I²S, Left-Justified or Right-Justified(DAC only) digital interface formats

with varying bit depths from 16 to 24. Data is clocked out of the ADC or into the DAC on the rising edge of

SCLK. Figures 20-22 illustrate the general structure of each format. Refer to “Switching Specifications - Se-

rial Port” on page 20 for exact timing relationship between clocks and data.

Software

Control:

“Interface Control (Address 04h)” on page 49.

Hardware

Control:

Setting

Selection

“I²S/LJ” pin 3

Left-Justified Interface

I²S Interface

LRCK

SCLK

MS B

LS B

MS B

LS B

AOUTA / AINxA

Le ft C han ne l

R ig h t C han ne l

SDOUT

SDIN

AOUTB / AINxB

MSB

Figure 20. I²S Format

LRCK

SCLK

MS B

LS B

MS B

LS B

L eft C h an ne l

R ig h t C h a n ne l

SDOUT

SDIN

MSB

AOUTA / AINxA

AOUTB / AINxB

Figure 21. Left-Justified Format

LRCK

SCLK

MS B

LS B

MS B

LS B

Left C han ne l

R ig h t C han ne l

SDIN

AOUTA

AOUTB

Figure 22. Right-Justified Format (DAC only)

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