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TUSB216

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SLLSEZ6A – FEBRUARY 2019 – REVISED DECEMBER 2019

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7.5 TUSB216 Registers

Table 3 lists the memory-mapped registers for the TUSB216 registers. All register offset addresses not listed in

Table 3 should be considered as reserved locations and the register contents should not be modified.

Table 3. TUSB216 Registers

Offset

Acronym

Register Name

Section

0x1

EDGE_BOOST

This register is setting EDGE BOOST level.

Go

0x3

CONFIGURATION

This register is selecting device mode.

Go

0xE

DC_BOOST

This register is setting DC BOOST level.

Go

0x25

RX_SEN

This register is setting RX Sensitivity level.

Go

Complex bit access types are encoded to fit into small table cells. Table 4 shows the codes that are used for

access types in this section.

Table 4. TUSB216 Access Type Codes

Access Type

Code

Description

Read Type

RH

H

R

Set or cleared by hardware

Read

Write Type

W

W

Write

Reset or Default Value

-n

Value after reset or the default

value

7.5.1 EDGE_BOOST Register (Offset = 0x1) [reset = X]

EDGE_BOOST is shown in Figure 3 and described in Table 5.

Return to Summary Table.

This register is setting EDGE BOOST level.

Figure 3. EDGE_BOOST Register

7

6

5

4

3

2

1

0

ACB_LVL

RESERVED

RH/W-X

RH/W-X

Table 5. EDGE_BOOST Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

ACB_LVL

RH/W

X

XXXXb (sampled at startup from BOOST pin)

0000b to 1111b range

0x0 = BOOST PIN LEVEL 0 (lowest edge boost setting)

0x3 = BOOST PIN LEVEL 1

0x6 = BOOST PIN LEVEL 2

0xA = BOOST PIN LEVEL 3

0xF = (highest edge boost setting)

3-0

RESERVED

RH/W

X

These bits are reserved bits and set by hardware at reset.

When this register is modified the software should first read these

reserved bits and rewrite with the same values