P89C60X2BASLASH00 datasheet(12/56 Pages) PHILIPS

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Philips Semiconductors

Product data

P89C60X2/61X2

80C51 8-bit Flash microcontroller family

64KB Flash, 512B/1024B RAM

2003 Sep 11

FLASH EPROM MEMORY

GENERAL DESCRIPTION

The P89C60X2/61X2 Flash memory augments EPROM functionality

with in-circuit electrical erasure and programming. The Flash can be

read and written as bytes. The Chip Erase operation will erase the

entire program memory. The Block Erase function can erase any

Flash block. In-system programming (ISP) and standard parallel

programming are both available. On-chip erase and write timing

generation contribute to a user friendly programming interface.

The P89C60X2/61X2 Flash reliably stores memory contents even

after 10,000 erase and program cycles. The cell is designed to

optimize the erase and programming mechanisms. In addition, the

combination of advanced tunnel oxide processing and low internal

electric fields for erase and programming operations produces

reliable cycling. The P89C60X2/61X2 uses a +5 V VPP supply to

perform the Program/Erase algorithms (12 V tolerant).

FEATURES

• Flash EPROM internal program memory with Block Erase.

• Internal 1-kbyte fixed BootROM, containing low-level in-system

programming routines and a default serial loader.

• Loader in BootROM allows in-system programming via the serial

port.

• Up to 64 kbytes external program memory if the internal program

memory is disabled (EA = 0).

• Programming and erase voltage +5 V (+12 V tolerant).

• Read/Programming/Erase using ISP:

– Byte Programming (8

ms).

– Typical erase times:

Block Erase (4 kbytes) in 3 seconds.

Full-chip erase in 15 seconds.

• Parallel programming with 87C51 compatible hardware interface

to programmer.

• Programmable security for the code in the Flash.

• 10,000 minimum erase/program cycles for each byte.

• 10-year minimum data retention.

FLASH PROGRAMMING AND ERASURE

There are two methods of erasing or programming of the Flash

memory that may be used. First, the on-chip ISP boot loader may be

invoked. Second, the Flash may be programmed or erased using

parallel method by using a commercially available EPROM

programmer. The parallel programming method used by these

devices is similar to that used by EPROM 87C51, but it is not

identical, and the commercially available programmer will need to

have support for these devices.

FLASH MEMORY CHARACTERISTICS

Flash User Code Memory Organization

The P89C60X2/61X2 contains 64 kbytes Flash user code program

memory organized into 4-kbyte blocks (see Figure 1).

Boot ROM

When the microcontroller programs its Flash memory during ISP, all

of the low level details are handled by code that is contained in a

1 kbyte BootROM. BootROM operations include: erase block,

program byte, verify byte, program security bit, etc.

Clock Mode

The clock mode feature sets operating frequency to be 1/12 or 1/6 of

the oscillator frequency. The clock mode configuration bit, FX2, is

located in the Security Block (See Table 1). FX2, when programmed,

will override the SFR clock mode bit (X2) in the CKCON register. If

FX2 is erased, then the SFR bit (X2) may be used to select between

6-clock and 12-clock mode.

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