889831AK

www.icst.com/products/hiperclocks.html

REV. A JUNE 16, 2005

13

Integrated

Circuit

Systems, Inc.

ICS889831

3.3V

C5

R7

133

R9

133

3.3V

3.3V

+

-

R6

82.5

+

-

LVPECL

Zo = 50

Zo = 50

3.3V

R4

82. 5

C6

R1

100

3.3V

C1

0.1u

Zo = 50

C2

0.1u

R10

82.5

R5

133

3.3V

Zo = 50

R3

133

R2

100

Zo = 50

U1

ICS889831

1

2

3

4

9

10

11

12

Q1

nQ1

Q2

nQ2

nIN

VREF_AC

VT

IN

2.5V

R8

82. 5

Zo = 50

Figure 8 shows a schematic example of the ICS889831. This

schematic provides examples of input and output handling.The

ICS889831 input has built-in 50

Ω termination resistors.The in-

put can directly accept various types of differential signal with-

out AC couple. For AC couple termination, the ICS889831 also

provides the VREF_AC pin for proper offset level after the AC

couple. This example shows the ICS889831 input driven by a

2.5V LVPECL driver with AC couple. The ICS889831 outputs

are LVPECL driver. In this example, we assume the traces are

long transmission line and the receiver is high input impedance

without built-in matched load. An example of 3.3V LVPECL ter-

mination is shown in this schematic. Additional termination ap-

proaches are shown in the LVPECL Termination Application Note.