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SAFC161PI датащи(PDF) 53 Page - Infineon Technologies AG |
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SAFC161PI датащи(HTML) 53 Page - Infineon Technologies AG |
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53 / 400 page ![]() &3, 7KH &HQWUDO 3URFHVVLQJ 8QLW &38 User’s Manual 4-5 1999-08 Figure 4-2 Sequential Instruction Pipelining Standard Branch Instruction Processing Instruction pipelining helps to speed sequential program processing. In the case that a branch is taken, the instruction which has already been fetched providently is mostly not the instruction which must be decoded next. Thus, at least one additional machine cycle is normally required to fetch the branch target instruction. This extra machine cycle is provided by means of an injected instruction (see figure below). Figure 4-3 Standard Branch Instruction Pipelining If a conditional branch is not taken, there is no deviation from the sequential program flow, and thus no extra time is required. In this case the instruction after the branch instruction will enter the decode stage of the pipeline at the beginning of the next machine cycle after decode of the conditional branch instruction. 1 Machine Cycle FETCH I 2 I 1 I 3 I 2 I 1 I 4 I 3 I 2 I 1 I 6 I 5 I 4 I 3 I 5 I 4 I 3 I 2 I 1 DECODE EXECUTE WRITEBACK time 1 Machine Cycle FETCH I n+2 BRANCH I n . . . I TARGET (I INJECT) BRANCH I n I TARGET+1 I TARGET (I INJECT) BRANCH I TARGET+3 I TARGET+2 I TARGET+1 I TARGET I TARGET+2 I TARGET+1 I TARGET (I INJECT) BRANCH I n . . . . . . DECODE EXECUTE WRITEBACK time Injection |
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