2

FN3084.5

ICL7126

Absolute Maximum Ratings

Thermal Information

Supply Voltage V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15V

Analog Input Voltage (Either Input) (Note 1) . . . . . . . . . . . . .V+ to V-

Reference Input Voltage (Either Input) . . . . . . . . . . . . . . . . .V+ to V-

Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TEST to V+

Operating Conditions

Thermal Resistance (Typical, Note 2)

θ

PDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

50

NOTE: Pb-free PDIPs can be used for through hole wave solder

processing only. They are not intended for use in Reflow solder

processing applications.

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Input voltages may exceed the supply voltages provided the input current is limited to

±100µA.

2.

Electrical Specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNITS

SYSTEM PERFORMANCE

Zero Input Reading

-000.0

±000.0

+000.0

Digital

Reading

Ratiometric Reading

999

999/100

0

1000

Digital

Reading

Rollover Error

Difference in Reading for Equal Positive and Negative

Inputs Near Full Scale

-

±0.2

±1

Counts

Linearity

Full Scale = 200mV or Full Scale = 2V Maximum Deviation

from Best Straight Line Fit (Note 5)

-

±0.2

±1

Counts

Common Mode Rejection Ratio

-

50

-

µV/V

Noise

(Peak-To-Peak Value Not Exceeded 95% of Time) (Note 5)

-15-

µV

Leakage Current Input

-

1

10

pA

Zero Reading Drift

o

C To

-

0.2

1

Scale Factor Temperature Coefficient

o

C To

-1

5

V+ Supply Current

-

70

100

µA

COMMON Pin Analog Common Voltage

25k

Ω Between Common and Positive Supply

(With Respect to + Supply)

2.4

3.0

3.2

V

Temperature Coefficient of Analog Common

25k

Ω Between Common and Positive Supply

(With Respect to + Supply) (Note 5)

-80-

Peak-To-Peak Segment Drive Voltage

Peak-To-Peak Backplane Drive Voltage

V+ = to V- = 9V (Note 4)

4

5.5

6

V

Power Dissipation Capacitance

vs Clock Frequency

-

40

-

pF

NOTES:

3. Unless otherwise noted, specifications are tested using the circuit of Figure 1.

4. Back plane drive is in phase with segment drive for ‘off’ segment, 180 degrees out of phase for ‘on’ segment. Frequency is 20 times conversion

rate. Average DC component is less than 50mV.

5. Not tested, guaranteed by design.