LPC47M14X datasheet(158/205 Pages) SMSC

158 / 205 page

SMSC DS – LPC47M14X

Page 158

Rev. 03/19/2001

ADDRESS

DESCRIPTION

STATE

Chip Level

Vendor Defined

0x25

Reserved - Writes are ignored, reads return 0.

Configuration

Address Byte 0

Default

=0x2E (Sysopt=0)

=0x4E (Sysopt=1)

on VCC POR and

HARD RESET

0x26

Bit[7:1] Configuration Address Bits [7:1]

Bit[0] = 0

See Note 2

Configuration

Address Byte 1

Default = 0x00

on VCC POR and

HARD RESET

0x27

Bit[7:0] Configuration Address Bits [15:8]

See Note 2

Default = 0x00

on VCC POR,

SOFT RESET and

HARD RESET

0x28

Bits[7:0] Reserved - Writes are ignored, reads return

Chip Level

Vendor Defined

0x29

Reserved - Writes are ignored, reads return 0.

TEST 6

Default = 0x00, on

VCC POR and

VTR POR

0x2A R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired results.

TEST 4

Default = 0x00, on

VCC POR and

VTR POR

0x2B R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired results.

TEST 5

Default = 0x00, on

VCC POR and

VTR POR

0x2C R/W

Bit[7] Test Mode: Reserved for SMSC.

Users

should not write to this bit, may produce undesired

results.

Bit[6] 8042 Reset:

1 = put the 8042 into reset

0 = take the 8042 out of reset

Bits[5:0] Test Mode: Reserved for SMSC. Users

should not write to this bit, may produce undesired

results.

TEST 1

Default = 0x00, on

VCC POR and

VTR POR

0x2D R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired results.

TEST 2

Default = 0x00, on

VCC POR and

VTR POR

0x2E R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired results.

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