LPC47M14X datasheet(154/205 Pages) SMSC

154 / 205 page

SMSC DS – LPC47M14X

Page 154

Rev. 03/19/2001

Notes: HARD RESET: PCI_RESET# pin asserted

SOFT RESET: Bit 0 of Configuration Control register set to one

All host accesses are blocked for 500µs after Vcc POR (see Power-up Timing Diagram)

Table 61 – LPC47M14x Configuration Registers Summary

INDEX

TYPE

HARD

RESET

VCC POR

VTR POR

SOFT

RESET

CONFIGURATION REGISTER

GLOBAL CONFIGURATION REGISTERS

0x02

0x00

Config Control

0x03

Reserved – reads return 0

0x07

R/W

0x00

Logical Device Number

0x20

0x5F

Device ID - hard wired

0x21

0x00

Device Rev - hard wired

0x22

R/W

0x00

(Note 1)

0x00

(Note 1)

0x00

(Note 1)

0x00

(Note 1)

Power Control

0x23

R/W

0x00

Power Mgmt

0x24

R/W

0x44

OSC

0x26

R/W

Sysopt=0:

0x2E

Sysopt=1:

0x4E

Sysopt=0:

0x2E

Sysopt=1:

0x4E

Configuration Port Address Byte 0

(Low Byte)

0x27

R/W

Sysopt=0:

0x00

Sysopt=1:

0x00

Sysopt=0:

0x00

Sysopt=1:

0x00

Configuration Port Address Byte 1

(High Byte)

0x28

Reserved

0x2A

R/W

0x00

TEST 6

0x2B

R/W

0x00

TEST 4

0x2C

R/W

0x00

TEST 5

0x2D

R/W

0x00

TEST 1

0x2E

R/W

0x00

TEST 2

0x2F

R/W

0x00

TEST 3

LOGICAL DEVICE 0 CONFIGURATION REGISTERS (FDD)

0x30

R/W

0x00

Activate

0x60,

0x61

R/W

0x03,

0xF0

0x03,

0xF0

0x03,

0xF0

0x03,

0xF0

Primary Base I/O Address

0x70

R/W

0x06

Primary Interrupt Select

0x74

R/W

0x02

DMA Channel Select

0xF0

R/W

0x0E

FDD Mode Register

0xF1

R/W

0x00

FDD Option Register

0xF2

R/W

0xFF

FDD Type Register

0xF4

R/W

0x00

FDD0

0xF5

R/W

0x00

FDD1

LOGICAL DEVICE 1 CONFIGURATION REGISTERS (Reserved)

LOGICAL DEVICE 2 CONFIGURATION REGISTERS (Reserved)

LOGICAL DEVICE 3 CONFIGURATION REGISTERS (Parallel Port)

0x30

R/W

0x00

Activate

0x60,

0x61

R/W

0x00,

0x00

0x00,

0x00

0x00,

0x00

0x00,

0x00

Primary Base I/O Address

0x70

R/W

0x00

Primary Interrupt Select

0x74

R/W

0x04

DMA Channel Select

0xF0

R/W

0x3C

Parallel Port Mode Register

0xF1

R/W

0x00

Parallel Port Mode Register 2

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