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High Speed CMOS Logic – 74HC164

Rev 1.0

24/11/17

LIMITS

PARAMETER

SYMBOL

CONDITIONS

25°C

85°C

FULL RANGE

4

UNITS

2.0V

1.9

1.9

1.9

4.5V

4.4

4.4

4.4

6.0V

5.9

5.9

5.9

V

3.0V

2.48

2.34

2.34

V

4.5V

3.98

3.84

3.84

Minimum High-Level

Output Voltage

6.0V

5.48

5.34

5.34

V

2.0V

0.1

0.1

0.1

4.5V

0.1

0.1

0.1

6.0V

0.1

0.1

0.1

V

3.0V

0.26

0.33

0.33

V

4.5V

0.26

0.33

0.33

V

Maximum Low-Level

Output Voltage

6.0V

0.26

0.33

0.33

V

Maximum Input

Leakage Current

6.0V

GND

±0.1

±1.0

±1.0

µA

Maximum Quiescent

Supply Current

6.0V

GND,

4

40

40

µA

 

LIMITS

PARAMETER

SYMBOL

CONDITIONS

25°C

85°C

FULL RANGE

4

UNITS

2.0V

10

10

10

3.0V

20

20

20

4.5V

40

35

35

Maximum

Clock Frequency,

(50% duty cycle)

6.0V

50

45

45

ns

2.0V

160

200

200

3.0V

100

150

150

4.5V

32

40

40

Maximum

Propagation Delay,

CLK to Q

6.0V

27

34

34

ns

5. Not production tested in die form, characterized by chip design and tested in package.