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Part 1-14: Input Mode Dependent Data
Symbol
Width
(bits)
Address
For
640x350
Description
VPW
11
00H
01H
LCD VSYNC pulse width
VBP
11
02H
03H
LCD VSYNC back porch (including VPW)
VBP Source
11
04H
05H
LCD VSYNC back porch (source equivalent)
= VBP * Line Expansion and round up
Target Skip
Pixel
11
06H
07H
If VBP can not be converted into source evenly, the
leftover is converted into number of pixels
VSIZE
11
08H
09H
LCD number of lines
HPW
11
0AH
0BH
LCD HSYNC pulse width
HBP
11
0CH
0DH
LCD HSYNC back porch (including HPW)
HSIZE
11
0EH
0FH
LCD number of columns
HTOTAL
11
10H
11H
LCD total number of pixels per line including all porches
HTOTAL
Source
12
12H
13H
LCD total number of clocks per line (source equivalent) =
HTOTAL/Line Expansion
Line
Expansion
4
14H [6:3]
Vertical source-to-destination scaling factor
0:
one-to-one expansion (no expansion)
1-15: expansion ratio other than one-to-one (expansion)
Pixel
Expansion
3
14H [2:0]
Horizontal source-to-destination scaling factor
0:
one-to-one expansion (no expansion)
1-7: expansion ratio other than one-to-one (expansion)
H. Fog Factor
8
15H[7:0]
Horizontal fogging factor high byte
H. Fog Factor
8
16H[7:0]
Horizontal fogging factor low byte
V. Fog Factor
8
17H[7:0]
Vertical fogging factor high byte
V. Fog Factor
8
18H[7:0]
Vertical fogging factor low byte
Minimum
Input lines
[10:8]
3
19H[6:4]
Upper 3 bits of minimum input
lines
Maximum
Input pixels
[10:8]
3
19H[2:0]
Upper 3 bits of maximum input
pixels
Minimum
input lines
[7:0]
8
1AH
Minimum input lines =
(VSIZE + VBP)* Line Expansion
When the input has fewer lines than this value, it is
considered as an ERROR, and INPUT_X status bit will be
HIGH.
Maximum
input pixels
[7:0]
8
1BH
Maximum input pixels per line. Auto clock recovery will
not set input PLL divisor larger than this value.
Source
HSIZE[10:8]
3
1CH [6:4]
Source horizontal size upper 3 bits
Source
VSIZE[10:8]
3
1CH [2:0]
Source vertical size upper 3 bits
Source
HSIZE[7:0]
8
1DH
Source horizontal size lower 8 bits
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