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STM32MP157C датащи(PDF) 166 Page - STMicroelectronics

номер детали STM32MP157C
подробное описание детали  Arm® dual Cortex®-A7 650 MHz Cortex®-M4 MPU, 3D GPU, TFT/DSI, 37 comm. interfaces, 29 timers, adv. analog, crypto
PDF  258 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32MP157C датащи(HTML) 166 Page - STMicroelectronics

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Electrical characteristics
STM32MP157C
166/258
DS12505 Rev 2
6.3.17
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in Table 52: I/O static characteristics are
derived from tests performed under the conditions summarized in Table 13: General
operating conditions. All I/Os are CMOS and TTL compliant.
Table 51. I/O current injection susceptibility(1)
Symbol
Description
Negative
injection
Positive
injection
Unit
IINJ
ANA0, ANA1, DSI_D0_P, DSI_D0_N, DSI_CK_P,
DSI_CK_N, DSI_D1_P, DSI_D1_N, PA4, PA5
00
mA
PG2, PG3, PG4, PH2
0
N/A
All other FTxx I/Os
5
N/A
1. Guaranteed by characterization
.
Table 52. I/O static characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Unit
VIL(1)
I/O input low level voltage
1.71 V < VDD < 2.7 V
-
-
0.35 × VDD
V
2.7 V < VDD < 3.6 V
-
-
0.3 × VDD
1.71 V < VDD < 3.6 V
-
-
0.45 × VDD
+ 0.35
VIH(1)
I/O input high level voltage
1.71 V < VDD < 3.6 V
0.7 × VDD
--
V
VHYS(1)
TT_xx, FT_xxx and NRST I/O
input hysteresis
1.71 V < VDD < 3.6 V
-
0.1 ×
VDD
-mV
Ileak
FT_xx input leakage current(1)
0 < VIN ≤ Max(VDD)(6)
--
250
nA
Max(VDD) < VIN ≤ 5.5 V
(6)(2)(3)
-
-
3500
FT_u, IO
0 < VIN ≤ Max(VDD)(6)
--
500
Max(VDD) < VIN ≤ 5.5 V
(6)(3)
-
-
5000(4)
TT_xx input leakage current
0 < VIN ≤ Max(VDD) (6)
--
100
RPU
Weak pull-up equivalent
resistor(5)
VIN=VSS
25
40
55
kΩ
RPD
Weak pull-down equivalent
resistor(5)
VIN=VDD(6)
25
40
55
CIO
I/O pin capacitance
-
-
5
-
pF
1. Guaranteed by design.
2. All FT_xx IO except FT_uf, FT_u.
3. VIN must be less than Max(VDD) + 3.6 V.
4. To sustain a voltage higher than MIN(VDD, VDDA, VDD3V3_USBxxx) +0.3 V, the internal pull-up and pull-down resistors must
be disabled.



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