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SSD1963 датащи(PDF) 46 Page - List of Unclassifed Manufacturers

номер детали SSD1963
подробное описание детали  1215KB Embedded Display SRAM LCD Display Controller
PDF  93 Pages
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производитель  ETC2 [List of Unclassifed Manufacturers]
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SSD1963 датащи(HTML) 46 Page - List of Unclassifed Manufacturers

Back Button SSD1963 Datasheet HTML 42Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 43Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 44Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 45Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 46Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 47Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 48Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 49Page - List of Unclassifed Manufacturers SSD1963 Datasheet HTML 50Page - List of Unclassifed Manufacturers Next Button
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Solomon Systech
Jan 2010
P 46/93
Rev 1.1
SSD1963
9.34 get_lcd_mode
Command
0xB1
Parameters
7
D/C
D7
D6
D5
D4
D3
D2
D1
D0
Hex
Command
0
1
0
1
1
0
0
0
1
B1
Parameter 1
1
0
0
A5
A4
A3
A2
A1
A0
xx
Parameter 2
1
0
B6
B5
0
0
0
0
0
xx
Parameter 3
1
0
0
0
0
0
HDP10
HDP9
HDP8
xx
Parameter 4
1
HDP7
HDP6
HDP5
HDP4
HDP3
HDP2
HDP1
HDP0
xx
Parameter 5
1
0
0
0
0
0
VDP10
VDP9
VDP8
xx
Parameter 6
1
VDP7
VDP6
VDP5
VDP4
VDP3
VDP2
VDP1
VDP0
xx
Parameter 7
1
0
0
G5
G4
G3
G2
G1
G0
xx
Description
Get the current LCD panel mode and resolution
A[5] : TFT panel data width(POR = 0)
0
18-bit
1
24-bit
A[4] : TFT color depth enhancement enable(POR = 0)
0
Disable FRC or dithering
1
Enable FRC or dithering for color depth enhancement
If the panel data width was set to 24-bit, FRC and dithering feature will be disabled automatic regardless the value of this
register.
A[3] : TFT FRC enable (POR = 0)
0
TFT dithering enable
1
TFT FRC enable
A[2] : LSHIFT polarity (POR = 0)
The dot clock pulse polarity.
0
Data latch in falling edge
1
Data latch in rising edge
A[1] : LLINE polarity (POR = 0)
The horizontal sync pulse polarity.
0
Active low
1
Active high
A[0] : LFRAME polarity (POR = 0)
The vertical sync pulse polarity.
0
Active low
1
Active high
B[6:5] : TFT type(POR = 01)
00, 01
TFT mode
10
Serial RGB mode
11
Serial RGB+dummy mode
HDP[10:8] : High byte of the horizontal panel size (POR = 010)
HDP[7:0] : Low byte of the horizontal panel size (POR = 01111111)
VDP[10:8] : High byte of the vertical panel size (POR = 001)



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