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OB2269AP датащи(PDF) 9 Page - Lite-On Technology Corporation

номер детали OB2269AP
подробное описание детали  Current Mode PWM Controller
PDF  12 Pages
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производитель  LITEON [Lite-On Technology Corporation]
домашняя страница  http://www.liteon.com.tw/databook/default.htm
Logo LITEON - Lite-On Technology Corporation

OB2269AP датащи(HTML) 9 Page - Lite-On Technology Corporation

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©On-Bright Electronics
Confidential
A Liteon Semiconductor Company
- 9 -
V2.1
OB2268
OB2269
Current Mode PWM Controller
OB2268/9 Gate is connected to an external
MOSFET gate for power switch control. Too weak
the gate drive strength results in higher conduction
and switch loss of MOSFET while too strong gate
drive output compromises the EMI.
A good tradeoff is achieved through the built-in
totem pole gate design with right output strength
and dead time control. The low idle loss and good
EMI system design is easier to achieve with this
dedicated control scheme. An internal 18V clamp is
added for MOSFET gate protection at higher than
expected VDD input.
• Protection Controls
Good
system
reliability
is
achieved
with
OB2268/9’s rich protection features including
Cycle-by-Cycle current limiting (OCP), Over Load
Protection (OLP), over temperature protection
(OTP), on-chip VDD over voltage protection (OVP,
optional) and under voltage lockout.(UVLO).
The OCP threshold is input line voltage adjusted to
compensate the increased output current limit at
higher voltage caused by inherent Over-Current
sensing and control delay. A constant output power
limit is achieved with recommended reference
design on OB2268/9.
At overload condition when FB input voltage
exceeds power limit threshold value for more than
80mS, control circuit reacts to shut down the output
power MOSFET. Device restarts when VDD
voltage drops below UVLO limit.
Similarly, control circuit shuts down the power
MOSFET when an Over Temperature condition is
detected. OB2268/9 resumes the operation when
temperature drops below the hysteresis value.
VDD
is
supplied
with
transformer
auxiliary
winding output. It is clamped when VDD is higher
than 30V. The power MOSFET is shut down when
VDD drops below UVLO limit and device enters
power
on
start-up
sequence
thereafter.



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