DSA1101 datasheet(3/24 Pages) MICROCHIP

3 / 24 page

TABLE 1-1:

ELECTRICAL CHARACTERISTICS

Parameter

Symbol

Min.

Typ.

Max.

Units

Conditions

Supply Voltage (Note 1)

VDD

2.25

—

3.63

—

Supply Current

IDD

—

0.095

DSA1101/05, EN pin low. Output

is disabled and device is in

standby

—

DSA1121/25, EN pin low, output

is disabled

—

EN pin high, output is enabled

CL = 15 pF, FO = 100 MHz

Frequency Stability

(Including frequency

variations due to initial

tolerance, temp. and

power supply voltage)

Δf

—

±20

ppm

All temp ranges

—

±25

—

±50

Aging

Δf

—

±5

ppm

1 year @ 25°C

Startup Time (Note 2)

tSU

—

T = 25°C

Input Logic Levels

Input Logic High

VIH

0.75 x VDD

—

Input Logic Low

VIL

—

0.1 x VDD

—

Output Disable Time (Note 3)

tDS

—

Output Enable Time

tEN

—

DSA1101/05

DSA1121/25

Enable Pull-Up Resistor

(Note 4)

—

kΩ

Internally pulled-up

CMOS Output

Output Logic Level High

VOH

0.9 x VDD

—

I = ±6 mA

Output Logic Level Low

VOL

—

0.1 x VDD

Output Transition Rise Time

—

1.1

DSA1101/21, 20% to 80%,



CL = 15 pF

—

DSA1105/25, 20% to 80%,



CL = 15 pF

Output Transition Fall Time

—

1.3

DSA1101/21, 20% to 80%,



CL = 15 pF

—

4.7

DSA1105/25, 20% to 80%,



CL = 15 pF

Frequency

2.3

—

170

MHz

CL = 15 pF and –40°C to +85°C

3.3

—

170

CL = 15 pF, –40°C to +105°C

and –40°C to +125°C

Output Duty Cycle

SYM

—

Period Jitter

JPER

—

psRMS FOUT = 125 MHz

Integrated Phase Noise

JPH

—

0.3

—

psRMS

200 kHz to 20 MHz @ 125 MHz

—

0.38

—

100 kHz to 20 MHz @ 125 MHz

—

1.7

12 kHz to 20 MHz @ 125 MHz

Note 1: Pin 6 VDD should be filtered with 0.1 µF capacitor.

2: tSU is time to 100 ppm of output frequency after VDD is applied and outputs are enabled.

3: Output Waveform and Test Circuit figures define the parameters.

4: Output is enabled if pad is floated or not connected.

 2018 Microchip Technology Inc.

DS20005890B-page 3

DSA1101/21/05/25

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