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BM83 датащи(PDF) 17 Page - Microchip Technology |
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BM83 датащи(HTML) 17 Page - Microchip Technology |
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17 / 74 page ![]() – One stereo single-ended line input – One stereo single-ended line output – One stereo single-ended headphone output (capacitor-less connection) • Built-in circuit – MIC bias – Reference and biasing circuitry • Optional digital High Pass Filter (HPF) on ADC path • Silence detection – To turn-off the DSP and audio codec subsystem, if there is no Line-In data after UI configured time stamp. • Anti-pop function (pop reduction system to reduce audible glitches) • Sampling rates: – ADC/DAC/I2S: 8 kHz, 16 kHz, 44.1 kHz, and 48 kHz Note: The sampling rates can be selected in the CODEC Setup tab of Config Tool. 3.2.1 DAC Performance The audio graphs in this section are produced in the following conditions: • At room temperature • Using BM83 EVB platform with BM83 module mounted on BM83 Carrier Board • Input signal = 1KHz sine tone, level sweep across -100dBv to 6dBv, frequency sweep across 20Hz to 20KHz at 1Fs input level • Various termination loads (16Ω, 32Ω, 100KΩ) • Analog gain = -3dB; digital gain = 0dB • A-weighting applied, 22K bandwidth. The following figures illustrate the DAC performance. BM83 Audio Subsystem © 2019 Microchip Technology Inc. Preliminary Datasheet DS70005402A-page 17 |
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