AD9878BSTZ datasheet(19/36 Pages) AD

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AD9878

Rev. A | Page 19 of 36

MSB/LSB TRANSFERS

The AD9878 serial port can support either MSB-first or LSB-first

data formats. This functionality is controlled by the LSB-first bit

in Register 0x00.

The AD9878 default serial port mode is MSB-first (see Figure 21),

which is programmed by setting Register 0x00 low. In MSB-first

mode, the instruction byte and data bytes must be written from

the MSB to the LSB. In MSB-first mode, the serial port internal

byte address generator decrements for each byte of the multibyte

communication cycle. When decrementing from 0x00, the

address generator changes to 0x1F.

When the LSB-first bit in Register 0x00 is set active high, the

AD9878 serial port is in LSB-first format (Figure 22). In LSB-

first mode, the instruction byte and data bytes must be written

from the LSB to the MSB. In LSB-first mode, the serial port

internal byte address generator increments for each byte of the

multibyte communication cycle. When incrementing from

0x1F, the address generator changes to 0x00.

R/W N1

A0 D7n D6n

D20 D10 D00

D7n D6n

D20 D10 D00

SCLK

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

SDIO

SDO

Figure 21. Serial Register Interface Timing, MSB-First Mode

D00 D10 D20

D6n D7n

SCLK

INSTRUCTION CYCLE

DATA TRANSFER CYCLE

SDIO

SDO

N1 R/W D00 D10 D20

D6n D7n

Figure 22. Serial Register Interface Timing, LSB-First Mode

NOTES ON SERIAL PORT OPERATION

The AD9878 serial port configuration bits reside in Bit 6 and

Bit 7 of Register Address 0x00. Note that the configuration

changes immediately upon writing to the last bit of the register.

For multibyte transfers, writing to this register might occur

during a communication cycle. Measures must be taken to

compensate for this new configuration for the remaining bytes of

the current communication cycle.

The same considerations apply when setting the reset bit in

values, but the software reset does not affect the bits in Register

Address 0x00. It is recommended to use only single-byte transfers

when changing serial port configurations or initiating a software

reset. A write to Bit 1, Bit 2, and Bit 3 of Address 0x00 with the

same logic levels as Bit 7, Bit 6, and Bit 5 (bit pattern: XY1001YX

binary) allows the user to reprogram a lost serial port config-

uration and to reset the registers to their default values. A

second write to Address 0x00, with the reset bit low and the

serial port configuration as specified above (XY), reprograms

the OSCIN multiplier setting. A changed fSYSCLK frequency is

stable after a maximum of 200 fMCLK cycles (wake-up time).

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