TOPWAY

LCD Module User Manual

LMT032DNAFWD

www.topwaysz.com

Document Name: LMT032DNAFWD-Manual-Rev0.1

Page: 6 of 17

6. AC Characteristics

6.1

AC Timing

Signal

Symbol

Parameter

Spec.

Unit

Description

Min.

Typ

Max.

D/C

tAST

Address setup time

10

-

-

ns

tAHT

Address hole time(Write/Read)

10

-

-

/CS

tCHW

Chip select “H” pulse width

10

-

-

ns

tCS

Chip select setup time(Write)

56

-

-

tRCSFM

Chip select setup time(Read FM)

440

-

-

tCSF

Chip select wait time(Write/Read)

12.5

-

-

tCSH

Chip select hold time

12.5

-

-

/WR

tWC

Write cycle

82.5

-

-

ns

tWRH

Control pulse “H” duration

18.75

-

-

tWRL

Control pulse “L” duration

18.75

-

-

/RD

(FM)

tRCFM

Read cycle(FM)

560

-

-

ns

When read from

frame memory

tRDHFM

Control pulse “H” duration(FM)

112

-

-

tRDLFM

Control pulse “L” duration(FM)

440

-

-

D[7:0]

tDST

Data setup time

12.5

-

-

ns

For maximum

CL=30pF

For minimum

CL=8pF

tDHT

Data hold time

8

-

-

tRATFM

Read access time(FM)

-

-

425

tODH

Output disable time

16

-

64

Note:

*1. The input signal rise time and fall time(tr , tf)is specified at 15 ns or less

*2. Logic high and low levels are specified as 30% and 70% of VDD for input signals.

*3 .Refer to the ILI9341 datasheet for more details.

6.2

Register Write/Read timing (for CPU 8 Bit)