Taiyo

Yuden

GMK212BJ105MD

(0805/35V)

www.t-yuden.com

muRata

GRM40-035X7R105K

(0805/50V)

www.murata.com

TDK

C3216X7R1H105KT

(1206/50V)

www.tdktca.com

C3216X7R1C475K

(1206/16V)

AVX

08053D105MAT

(0805/25V)

www.avxcorp.com

08056D475KAT

(0805/6.3V)

1206ZD475MAT

(1206/10V)

DIODE SELECTION

To maintain high efficiency it is recommended that the aver-

age current rating (I

larger than the peak inductor current (I

mum, the average current rating of the diode should be

larger than the maximum LED current. To maintain diode

integrity the peak repetitive forward current (I

greater than or equal to the peak inductor current (I

Diodes with low forward voltage ratings (V

capacitance magnitudes (C

high efficiency. The chosen diode must have a reverse

breakdown voltage rating (V

than the output voltage (V

is chosen, Schottky or not, certain selection criteria must be

followed:

1.

V

2.

I

≥ I

3.

I

FRM

≥ I

Lpeak

Some recommended diode manufacturers included but are

not limited to:

Vishay

SS12(1A/20V)

www.vishay.com

SS14(1A/40V)

SS16(1A/60V)

On

Semiconductor

MBRM120E

(1A/20V)

www.onsemi.com

MBRS1540T3

(1.5A/40V)

MBR240LT

(2A/40V)

Central

Semiconductor

CMSH1- 40M

(1A/40V)

www.centralsemi.com

SHUTDOWN AND START-UP

On startup, the LM3502 contains special circuitry that limits

the peak inductor current which prevents large current

spikes from loading the battery or power supply. When Cntrl

≥ 1.4V and both the En1 and En2 signals are less than 0.3V,

the LM3502 will enter a low I

During this low I

below the supply voltage and the soft-start will be reset to

limit the peak inductor current at the next startup. When both

En1 and En2 are less than 0.3V, the P1 PMOS and N2

NMOS switches will turn off.

will shutdown and the output voltage will be a diode drop

below the supply voltage. If the Cntrl pin is low for more than

12ms, the soft-start will reset to limit the peak inductor cur-

rent at the next startup.

device will not shutdown and reset the soft-start but shut off

the NMOS N1 Power Device to allow for PWM contrl of the

LED current.

THERMAL SHUTDOWN

The LM3502 stops regulating when the internal semiconduc-

tor junction temperature reaches approximately 140˚C. The

internal thermal shutdown has approximately 20˚C of hyster-

esis which results in the LM3502 turning back on when the

internal semiconductor junction temperature reaches 120˚C.

When the thermal shutdown temperature is reached, the

softstart is reset to prevent inrush current when the die

temperature cools.

UNDER VOLTAGE PROTECTION

The LM3503 contains protection circuitry to prevent opera-

tion for low input supply voltages. When Vin drops below

2.3V, typically the LM3502 will no longer regulate. In this

mode, the output volage will be one diode drop below Vin

and the softstart will be reset. When Vin increases above

2.4V, typically, the device will begin regulating again.

OVER VOLTAGE PROTECTION

The LM3502 contains dedicated circuitry for monitoring the

output voltage. In the event that the LED network is discon-

nected from the LM3502, the output voltage will increase

and be limited to 15.5V(typ.) for the 16V version , 24V(typ.)

for the 25V version, 34V(typ.) for the 35V version and

42V(typ.) for the 44V version (see eletrical table for more

details). In the event that the network is reconnected, regu-

lation will resume at the appropriate output voltage.

LAYOUT CONSIDERATIONS

All components, except for the white LEDs, must be placed

as close as possible to the LM3502. The die attach pad

(DAP) must be soldered to the ground plane.

The input bypass capacitor C

be placed close to the IC and connect between the V

PGND pins. This will reduce copper trace resistance which

effects input voltage ripple of the IC. For additional input

voltage filtering, a 100nF bypass capacitor can be placed in

parallel with C

IN

to shunt any high frequency noise to

ground. The output capacitor, C

the IC and be connected between the V

pins. Any copper trace connections for the C

can increase the series resistance, which directly effects

output voltage ripple and efficiency. The current setting re-

sistor, R1, should be kept close to the Fb pin to minimize

copper trace connections that can inject noise into the sys-

tem. The ground connection for the current setting resistor

network should connect directly to the PGND pin. The AGND

pin should be tied directly to the PGND pin. Trace connec-

tions made to the inductor should be minimized to reduce

power dissipation and increase overall efficiency while re-

ducing EMI radiation. For more details regarding layout

guidelines for switching regulators, refer to Applications Note

AN-1149.

www.national.com

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