98820 (04/01)

© 2001 IXYS All rights reserved

DSP 8

ADVANCE TECHNICAL INFORMATION

V

RSM

V

RRM

Type

V

V

900

800

DSP 8-08AC

1300

1200

DSP 8-12AC

Symbol

Test Conditions

Maximum Ratings

I

FRMS

T

30

A

I

F(AV)M

T

2 x 11

A

I

FSM

T

t = 10 ms

(50 Hz), sine

100

A

t = 8.3 ms

(60 Hz), sine

105

A

T

t = 10 ms

(50 Hz), sine

85

A

t = 8.3 ms

(60 Hz), sine

90

A

T

t = 10 ms

(50 Hz), sine

50

t = 8.3 ms

(60 Hz), sine

45

T

t = 10 ms

(50 Hz), sine

35

t = 8.3 ms

(60 Hz), sine

30

T

VJ

-40...+150

°C

T

VJM

150

°C

T

stg

-55...+150

°C

T

L

1.6 mm (0.063 in) from case for 10 s

260

°C

V

ISOL

50/60 Hz RMS; I

2500

V~

F

C

Mounting Force

11...65 / 2.5..15

N/lb

Weight

2g

Symbol

Test Conditions

Characteristic Values

I

R

Q

V

R

= V

≤

10

µA

T

≤

0.7

mA

V

F

R

I

≤

1.22

V

T

≤

1.26

V

V

T0

For power-loss calculations only

0.8

V

r

T

T

41

m

Ω

R

thJC

DC current

1.8

K/W

R

thCK

DC current (with heatsink compound)

typ.

0.6

K/W

a

Maximum allowable acceleration

100

V

800/1200 V

I

Phase-leg Rectifier Diode

Electrically Isolated Back Surface

ISOPLUS220 Outline

1

2

3

Features

l

Silicon chip on Direct-Copper-Bond

substrate

- High power dissipation

- Isolated mounting surface

- 2500V electrical isolation

l

For single and three phase bridge

configuration

l

Low cathode to tab capacitance (<15pF)

l

Planar passivated chips

l

Epoxy meets UL 94V-0

Notes: Data given for T

O

C and per diode unless otherwise specified

Q Pulse test: pulse Width = 5 ms, Duty Cycle < 2.0 %

RPulse test: pulse Width = 300 µs, Duty Cycle < 2.0 %

IXYS reserves the right to change limits, test conditions and dimensions.

* Patent pending

3

2

Isolated back surface *

1