GD25Q64CFJS datasheet(17/74 Pages) GIGADEVICE

17 / 74 page

3.3V Uniform Sector

Dual and Quad Serial Flash

GD25Q64C

7.3.

Write Enable for Volatile Status Register (50H)

The non-volatile Status Register bits can also be written to as volatile bits. This gives more flexibility to change the system

configuration and memory protection schemes quickly without waiting for the typical non-volatile bit write cycles or affecting

the endurance of the Status Register non-volatile bits. The Write Enable for Volatile Status Register command must be

issued prior to a Write Status Register command and any other commands can't be inserted between them. Otherwise,

Write Enable for Volatile Status Register will be cleared. The Write Enable for Volatile Status Register command will not set

the Write Enable Latch bit, it is only valid for the Write Status Register command to change the volatile Status Register bit

values.

Figure 4. Write Enable for Volatile Status Register Sequence Diagram

7.4. Read Status Register (RDSR) (05H or 35H or 15H)

The Read Status Register (RDSR) command is for reading the Status Register. The Status Register may be read at any

time, even while a Program, Erase or Write Status Register cycle is in progress. When one of these cycles is in progress, it

is recommended to check the Write in Progress (WIP) bit before sending a new command to the device. It is also possible

to read the Status Register continuously.

For command code “05H” / “35H” / “15H”, the SO will output Status Register bits

S7~S0 / S15-S8 / S23-S16.

Figure 5. Read Status Register Sequence Diagram

Command

05H or 35H or 15H

CS#

SCLK

High-Z

9 10 11 12 13 14 15

MSB

Register0/1/2

MSB

Register0/1/2

CS#

SCLK

Command(50H)

High-Z

GD25Q64CFJS датащи(PDF) 17 Page - GigaDevice Semiconductor (Beijing) Inc.