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GD25Q256DFER датащи(PDF) 26 Page - GigaDevice Semiconductor (Beijing) Inc.

номер детали GD25Q256DFER
подробное описание детали  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  89 Pages
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производитель  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
домашняя страница  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25Q256DFER датащи(HTML) 26 Page - GigaDevice Semiconductor (Beijing) Inc.

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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25Q256D
26
7.8.
Read Data Bytes (READ 03H or 4READ 13H)
The Read Data Bytes (READ) command is followed by a 3-Byte address (A23-A0), and each bit being latched-in on
the rising edge of SCLK. Then the memory content, at that address, is shifted out on SO, and each bit being shifted out, at
a Max frequency fR, on the falling edge of SCLK. The first Byte addressed can be at any location. The address is
automatically incremented to the next higher address after each Byte of data is shifted out. The whole memory can, therefore,
be read with a single Read Data Bytes (READ) command. Any Read Data Bytes (READ) command, while an Erase,
Program or Write cycle is in progress, is rejected without having any effects on the cycle that is in progress.
Figure 12. Read Data Bytes Sequence Diagram (ADS=0)
Figure 13. Read Data Bytes Sequence Diagram (ADS=1)
Figure 14. Read Data with 4-Byte Address Sequence Diagram (ADS=0 or ADS=1)
Command
0
1
2
3
4
5
6
7
03H
CS#
SCLK
SI
SO
High-Z
8
9 10
28 29 30 31 32
MSB
3
2
1
0
34 35 36 37
33
23 22 21
7
6
5
4
3
2
1
0
38 39
24-bit address
MSB
Data Out1
Data Out2
Command
0
1
2
3
4
5
6
7
03H
CS#
SCLK
SI
SO
High-Z
8
9 10
36 37 38 39 40
MSB
3
2
1
0
42 43 44 45
41
31 30 29
7
6
5
4
3
2
1
0
46 47
32-bit address
MSB
Data Out1
Data Out2
Command
0
1
2
3
4
5
6
7
13H
CS#
SCLK
SI
SO
High-Z
8
9 10
36 37 38 39 40
MSB
3
2
1
0
42 43 44 45
41
31 30 29
7
6
5
4
3
2
1
0
46 47
32-bit address
MSB
Data Out1
Data Out2



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