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GD25R256D датащи(PDF) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25R256D датащи(HTML) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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5 / 82 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25R256D 5 2. GENERAL DESCRIPTION The GD25R256D (256M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2, and I/O3 . The Dual I/O data is transferred with speed of 208Mbits/s and the Quad I/O & Quad output data is transferred with speed of 416Mbits/s. CONNECTION DIAGRAM Figure 1 Connection Diagram Note: 1. Dedicated RESET# pin (Pin 3 of 16-LEAD SOP package or Pin A4 of 24-BALL TFBGA package) is available through special order. Please refer to Chapter 9 for detailed ordering information. 2. CS# must be driven high if chip is not selected. Please don’t leave CS# floating any time after power is on. CS# SO (IO1) IO2 VSS Top View VCC IO3 SCLK SI (IO0) 8–LEAD WSON 1 2 3 4 5 6 7 8 Top View A2 A3 A4 A5 B2 B3 B4 B5 B1 C1 C2 C3 C4 C5 D1 D2 D3 D4 D5 E1 E2 E3 E4 E5 NC NC NC NC NC IO3 NC IO2 VCC RESET# (1) SI(IO0) NC NC VSS NC SO(IO1) NC CS# SCLK NC NC NC NC NC 24-BALL TFBGA (5x5 ball array) CS# SO (IO1) IO2 VSS Top View VCC IO3 SCLK SI (IO0) 16-LEAD SOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 RESET# (1) NC NC NC NC NC NC NC |
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