AM79C987 datasheet(9/30 Pages) AMD

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AMD

P R E L I M I N A R Y

Am79C987

Port (P) Register

Command (C) Port

Data (D) Port

D = 1

Bank 0

Bank 1

Bank 31

Port (or Bank)

Pointer

000XXXXX

111XXXXX

D = 0

17305B-4

Figure 1. Overview of HIMIB Register Definition

An exception to the normal Command/Data Port access

scheme, is the Status Register which is read directly by

reading only the C Port. This allows the Status Register

to be read directly, without the need to write to the

C Port.

In the following description, all bit fields are ordered

such that the left most bit is the most significant bit. Un-

used Port and Register Numbers are reserved and

should not be accessed as this may cause device mal-

function.

When specifying the Port or Bank Number, the following

command byte is written to the C Port:

C Port Write

MSB

LSB

P[4:0] represent the Register Bank or Port Number.

These are organized as follows:

P = [P4P3P2P1P0]

Note that to access the P register the three most signifi-

cant bits of this byte must be zero.

P [4:0]

Port/Register Bank

Repeater Registers

Port Status Registers

Port Control Registers

16 – 23

Twisted Pair Ports Attributes

AUI Port Attributes

When specifying the Register or Attribute to be ac-

cessed, the following command byte is written to the

C Port.

C Port Write

MSB

LSB

R = [R4R3R2R1R0]

Note that to access the R register the three most signifi-

cant bits of this byte must be one.

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