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M95320 датащи(PDF) 17 Page - STMicroelectronics

номер детали M95320
подробное описание детали  32Kbit and 64Kbit Serial SPI Bus EEPROMs With High Speed Clock
PDF  42 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95320 датащи(HTML) 17 Page - STMicroelectronics

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M95640, M95320
(BP1, BP0) bits of the Status Register, are
also hardware protected against data
modification.
Regardless of the order of the two events, the
Hardware Protected Mode (HPM) can be entered:
–
by setting the Status Register Write Disable
(SRWD) bit after driving Write Protect (W) Low
–
or by driving Write Protect (W) Low after
setting the Status Register Write Disable
(SRWD) bit.
The only way to exit the Hardware Protected Mode
(HPM) once entered is to pull Write Protect (W)
High.
If Write Protect (W) is permanently tied High, the
Hardware Protected Mode (HPM) can never be
activated, and only the Software Protected Mode
(SPM), using the Block Protect (BP1, BP0) bits of
the Status Register, can be used.
Table 8. Address Range Bits
Note: b15 to b13 are Don’t Care on the 64 Kbit devices.
b15 to b12 are Don’t Care on the 32 Kbit devices.
Figure 11. Write Status Register (WRSR) Sequence
Device
32 Kbit
Devices
64 Kbit
Devices
Address Bits
A12-A0
A11-A0
C
D
AI02282D
S
Q
2
1
3456789 10 11 12 13 14 15
High Impedance
Instruction
Status
Register In
0
765432
0
1
MSB



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