XRT73L03 datasheet(9/62 Pages) EXAR

9 / 62 page

áç

3 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

XRT73L03

PRELIMINARY

REV. P1.0.13

TxClk1

Transmit Clock Input for TPData and TNData - Channel 1:

This input pin must be driven at 34.368 MHz for E3 applications, 44.736 MHz

for DS3 applications or 51.84 MHz for SONET STS-1 applications. The

XRT73L03 uses this signal to sample the TPData1 and TNData1 input pins.

By default, the XRT73L03 is configured to sample these two pins on the falling

edge of this signal.

If operating in the HOST Mode, the XRT73L03 can be configured to sample

the TPData1 and TNData1 input pins on either the rising or falling edge of

TxClk1.

TxLEV1

Transmit Line Build-Out Enable/Disable Select - Channel 1:

This input pin is used to enable or disable the Transmit Line Build-Out circuit of

Channel 1.

Setting this pin to "High" disables the Line Build-Out circuit of Channel 1. In

this mode, Channel 1 outputs partially-shaped pulses onto the line via the

TTIP1 and TRing1 output pins.

Setting this pin to "Low" enables the Line Build-Out circuit of Channel 1. In this

mode, Channel 1 outputs shaped pulses onto the line via the TTIP1 and

TRing1 output pins.

To comply with the Isolated DSX-3/STSX-1 Pulse Template Requirements per

Bellcore GR-499-CORE or Bellcore GR-253-CORE:

1. Set this input pin to "1" if the cable length between the Cross-Connect and

the transmit output of Channel 1 is greater than 225 feet.

2. Set this input pin to "0" if the cable length between the Cross-Connect and

the transmit output of Channel 1 is less than 225 feet.

This pin is active only if the following two conditions are true:

a. The XRT73L03 is configured to operate in either the DS3 or SONET STS-1

Modes.

b. The XRT73L03 is configured to operate in the Hardware Mode.

NOTE: If the XRT73L03 is going to be operating in the HOST Mode, this pin

should be tied to GND.

TAOS1

Transmit All Ones Select - Channel 1:

A “High" on this pin causes the Transmit Section of Channel 1 to generate and

transmit a continuous AMI all “1’s" pattern onto the line. The frequency of this

"1’s" pattern is determined by TxClk1.

NOTES:

1. This input pin is ignored if the XRT73L03 is operating in the HOST

Mode.

2. if the XRT73L03 is going to be operating in the HOST Mode, this pin

should tie tied to GND..

TxAVDD1

****

Transmitter Analog 3.3V+ 5% VDD - Transmitter 1

DMO1

Drive Monitor Output - Channel 1:

If no transmitted AMI signal is present on MTIP1 and MRing1 input pins for

128±32 TxClk periods, then DMO1 toggles and remains "High" until the next

AMI signal is detected.

TxAGND1

****

Transmitter Analog GND - Transmitter 1

AGND1

****

Analog GND (Substrate Connection) - Channel 1:

PIN DESCRIPTION

PIN #SIGNAL NAME

TYPE

DESCRIPTION

XRT73L03 датащи(PDF) 9 Page - Exar Corporation

XRT73L03 датащи(HTML) 9 Page - Exar Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62

датащи скачать

ссылки URL