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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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D17133CS датащи(PDF) 52 Page - NEC |
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D17133CS датащи(HTML) 52 Page - NEC |
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52 / 289 page  CHAPTER 6 STACK 37 Table 6-1. Operation of the Stack Pointer Instruction Stack Pointer Value Counter of Interrupt Stack Register CALL addr CALL @AR MOVT DBF, @AR –1 Not changed (1st instruction cycle) PUSH AR Interrupt receipt –1 –1 RET RETSK MOVT DBF, @AR +1 Not changed (2nd instruction cycle) POP AR RETI +1 +1 As mentioned above, the stack pointer is a 3-bit counter and therefore can conceivably store any of the eight values from 0H to 7H. Since there are only five address stack registers, however, a stack pointer value that is greater than five will cause an internal reset signal to be generated (to prevent a software crash). Since the stack pointer is located in the register file, it can be read and written to directly by using the PEEK and POKE instructions to manipulate the register file. When this is done, the stack pointer value will change but the values in the address stack register will not be affected. 6.6 STACK OPERATION DURING SUBROUTINES, TABLE REFERENCES, AND INTERRUPTS Stack operation during execution of each command is explained in 6.6.1 to 6.6.3. 6.6.1 Stack Operation during Subroutine Calls (CALL) and Returns (RET, RETSK) Table 6-2 shows operation of the stack pointer (SP), address stack register, and the program counter (PC) during execution of subroutine calls and returns. |
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