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GD5F2GQ4RFZFS датащи(PDF) 37 Page - GigaDevice Semiconductor (Beijing) Inc.

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подробное описание детали  SPI(x1/x2/x4) NAND Flash
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производитель  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
домашняя страница  http://www.gigadevice.com/
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SPI(x1/x2/x4) NAND Flash
2G
37
13 RESET OPERATIONS
13.1 Soft Reset (FFH)
Figure13-1. Reset Sequence Diagram
Command
0
1
2
3
4
5
6
7
FFH
CS#
SCLK
SI
SO
High-Z
CS#
get feature
0
1
2
3
4
5
6
7
0FH
CS#
SLK
SI
SO
High-Z
8
9 10 11 12 13 14 15
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
MSB
Status register address
Status register data out
MSB
SCLK
SI
SO
tCS
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
7
6
5
4
3
2
1
0
Status register data out
7
6
MSB
The RESET (FFH) command stops all operations. For example, in case of a program or erase or read operation, the
reset command can make the device enter the wait state.
During a cache program or cache read, a reset can also stops the previous operation and the pending operation. The
OIP status can be read from 300ns after the reset command is sent.



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