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PI7C7100 датащи(PDF) 49 Page - Pericom Semiconductor Corporation

номер детали PI7C7100
подробное описание детали  3-Port PCI Bridge
PDF  132 Pages
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производитель  PERICOM [Pericom Semiconductor Corporation]
домашняя страница  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI7C7100 датащи(HTML) 49 Page - Pericom Semiconductor Corporation

Back Button PI7C7100 Datasheet HTML 45Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 46Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 47Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 48Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 49Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 50Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 51Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 52Page - Pericom Semiconductor Corporation PI7C7100 Datasheet HTML 53Page - Pericom Semiconductor Corporation Next Button
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41
09/18/00 Rev 1.1
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PI7C7100
3-Port PCI Bridge
ADVANCE INFORMATION
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Table 7–4. Setting Secondary Interface Data Parity Detected Bit
Table 7–4 shows setting the data parity detected bit in the status register of secondary interface. This bit is set under the
following conditions:
• The PI7C7100 must be a master on the secondary bus.
• The parity error response bit must be set in the bridge control register of secondary interface.
• The S_PERR# signal is detected asserted or a parity error is detected on the secondary bus.



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