GPLB30A

© Generalplus Technology Inc.

Proprietary & Confidential

16

JAN. 07, 2008

Version: 1.4

8.4. 912 Dots LCD Driver, 57 Segments × 16 Commons, 1/5 Bias with Bus Extender, Regulator Disabled - (4)

GPLB30A

LCDPanel (16x57)

PVDD

PVSS

AUDB

X32I

X32O

RESET

AUDA

V1

V2

V3

V4

CUP2

CUP1

CUP3

CUP4

VDD

PC1/MC1

PC0/MC0

PB[7:0]

VLCD

SEG0

SEG1

SEG14

SEG2

SEG15

PA1

PA2

PA3

PA4

PA5

.....

.....

.....

.....

.....

.....

.....

PA6

MC0

MC1

AD[7:0]

CI

PA6

VDD

VSS

VDD

Bus Extender

GPBA01B

DVP

XP[10:17]

XP[20:26]

XP[03:00]

WR

RD

XP27

A[7:0]

A[14:8]

A[18:15]

WE

OE

CE

D[7:0]

8

7

4

VDD

VDD

VSS

External

ROM/SRAM

8

VROUT

*1

VDD

VDD

30pF

C

*3

C

C

C

C

C

C

4.7

μF

0.1

μF

20pF

*2

20pF

*2

0.1

μF

Note*1:

Pin VROUT should be connected to VDD if internal Regulator is disabled.

Note*2:

These capacitor values are for design guidance only.

Different capacitor values may be required for different crystal/resonator used.

Note*3:

The value of the capacitance(C) would range from 0.1

μF to 4.7μF to stable the output voltage.