GPL10B datasheet(6/23 Pages) GENERALPLUS

6 / 23 page

GPL10B

Proprietary & Confidential

May 29, 2014

Version: 1.5

+V D D

X 32I

R O scillator

Note:

Length of the wiring for X32I and X32O should be as short as

possible.

5.5. Stop Clock Mode

The GPL10B supports the power saving mode for those

applications needing very low standby current.

The user can

simply enable the wake-up sources and then stop the CPU clock

by writing the STOP CLOCK register ($09).

The CPU will enter

standby and the RAM and I/O remain their previous states until

wake-up.

There are three sources of wake-up in this chip, PORT

IOEF wake-up, TIMER 0 wake-up and 2Hz wake-up.

After the

chip is wakening up, the internal CPU will go to the RESET state

and the RAM and I/O are not affected by the wake-up reset.

The

standby current of timepiece product typically is less than 8uA @

3.0V by using this mode and 32768Hz clock source in weak mode.

For non-timepiece products, 32768Hz crystal driver or R oscillator

(mask option) generates the 32768Hz clock source that also can

be turned off to stop the chip operation.

The standby current of

the GPL10B is less than 1uA @ 3.0V.

In this mode, IOEF port can

be used to wake up the chip.

5.6. Timer/Counter

The GPL10B contains one 12-bit timer/counter, TM0.

In timer

mode, TM0 is reloadable up-counter.

When timer overflows from

$0FFF to $0000, the carry signal will generate the INTERRUPT

signal if the corresponding bit is enabled in INT ENABLE register

($0D), and the timer will be auto reloaded to the user‘s setup value

and count up again.

If TM0 is being specified as a counter, the

user may reset the counter by loading 0 into register $14 and $1C.

After the counter being activated, the count value can also be read

from above registers on-the-fly, the read instruction will not affect

the counter's value or reset it.

The clock source of the timer/counter are selectable as the

following:

Timer/Counter

Addr.

Clock Source

12 BIT TIMER

$0014

$001C

CPU CLOCK (T) or T/4

TM0

12 BIT COUNTER

$0014

$001C

T/128, T/256, T/2048 or

EXT CLK

MODE SELECT REGISTER

$000B

Select TM0 timer or

counter

TIMER CLOCK SELECTOR

$001C

Select T or T/4

5.7. Interrupts

The GPL10B has six interrupt sources - INT0 (interrupt from

TIMER 0), 2KHz INT, LCDL INT (LCD service in share mode, due

to LCD registers is shared with the TIMER/COUNTER), 128Hz INT,

EXT INT (external INTERRUPT from IOCD1), 2Hz INT.

The

2KHz INT, LCDL INT (256 Hz in 1/3, 1/4 duty; 128 Hz in 1/2 duty),

128Hz INT, 2Hz INT, all are derived from 32768Hz Crystal

Oscillator by division.

5.8. Tone Output

The GPL10B provides TONE output that can directly drive

BUZZER.

It is a full-swing (VDD and VSS) signal and its

frequency source is the frequency of TIMER Carry divided by 2.

The block diagram is shown as below:

TONE

DRIVER

AUD

Timer Carry

Tone

5.9. Liquid Crystal Display

The GPL10B can directly drive the liquid crystal display (LCD)

panel of 1/2 duty, 1/3 duty, and 1/4 duty with 1/2 bias or 1/3 bias.

It has 4 commons and 32 segments signal pins.

In share mode

(Timer/Counter is used), the LCD is refreshed by LCDL interrupt.

The INT routine will read the number of common which is under

serving, and send the next common's pattern to LCD port ($10 -

$13) from RAM buffer.

If the Timer/the counter is not used,

hardware mechanism will auto refresh the LCD after writing

OPTION register ($1F).

GPL10B датащи(PDF) 6 Page - Generalplus Technology Inc.

GPL10B датащи(HTML) 6 Page - Generalplus Technology Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

датащи скачать

ссылки URL