Switched Capacitor Elliptic Lowpass Filter

Data Sheet

4/2004

Electrical Characteristics_______

(VDD = +5.0V, T = 25 C)

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© 2004 Mixed Signal Integration 2

PARAMETER

SYMBOL

CONDTIONS

MIN

TYP

MAX

UNITS

DC Specifications

Operating Voltage

VDD

2.7

5.5

V

Supply Current

IDD

PS = 0.5 State

0.2

0.6

1.0

mA

PS = 1 State

0.8

1.0

2.0

mA

PS = 0 State

50

250

400

uA

AC Specifications

Gain

Av

Fclk = 250 kHz

-1.00

0

1.00

dB

Maximum Corner Frequency

fo max

PS = 0.5 State

3

5

kHz

PS = 1 State FO=HIGH

10

20

Clock Feedthrough

Pedestal to Pedestal

- Filter Output

Fclk = 1 MHz

10

mV (p-p)

- Op Amp 1 Output

10

mV (p-p)

- Op Amp 2 Output

10

mV (p-p)

Clock to Corner

fCLK/fo

External Clock, FO = LOW 99

100

101

Hz/Hz

External Clock, FO = HIGH 49

50

51

Hz/Hz

Offset Voltage

20

100

mV

Output Voltage Swing

PS = 1 State, FO = LOW 3.5

4.0

V p-p

Dynamic Range

82

dB

Op Amp Specifications

Input Offset Voltage

Vos

10

mV

Output Voltage Swing

4.5

Vp-p

Slew Rate

6

V/uS

DC Gain

70

dB

Gain Bandwidth

bw

1.2

MHz

Level Shift Threshold

VTL-to-VTH

1.1

1.3

1.7

V

VTH-to-VTL

3.3

3.8

4.3

V

VTL-to-VTH VDD = 2.7V

0.75

0.85

0.95

V

VTH-to-VTL VDD = 2.7V

1.5

1.8

2.1

V

Power Select Pin Operation

State 1 High Power

PS

Voltage on PS Pin

VDD

V

State 0.5 Low Power

GND

V

State 0 Power Down

See note

VSS

V

Note: In external clock mode only. Power down is not available in on chip oscillator mode.