MS2LFSS datasheet(3/5 Pages) MSI

3 / 5 page

Dual Selectable Low Voltage Lowpass/Bandpass Filter

Data Sheet

09/2014

Pin Configuration

Web Site “www.mix-sig.com”

Pin Description________________

1. IN B

Filter Input B

2. VDD

Positive Power Supply, typically

1.2 Volts for Single Supply

3. CTVL

Activate or Disable Boost Circuit

Disable = 0, Activate = 1

4. PDA

Power Down Filter A

5. PD MIC

Power Down Mic Amp

6. PD OUTB

Power Down Output B

7. NC

8. CLK

Clock Input

9. NC

10.PWR

Sets Bias Current for Filter Stages

Lo=low power, Hi=normal power

11. NC

12. OUT A

Filter Output A

13. BYP

Bypass Capacitor for Boost Circuit,

voltage at this pin is negative in

relation to VSS, tie positive side of

polarized cap to VSS

14. VSS

Ground Pin, 0 Volts

for Single Supply

15. TYPE A

Filter Response Select Pin for Filter A

16. GND1

AC Ground, decouple with 0.1 uF to

VSS

17. VREF

Reference Voltage, internally

generated, typically VDD/2.2 for

Single Supply Operation, decouple

with 0.1 uF to VSS

18. MIC IN

Input of MIC Amp

19. MIC OUT

Output to MIC Amp

20. FSEL A

Selects Filter.

0 = Low Pass, 1 = Band Pass

21. TYPE B

Filter Response Select Pin for Filter B

22. FO B

Clock to Corner Select Pin

for Filter B

23. OUT B

Filter B Output

180 degrees out of phase from

OUT B

24. FO A

Clock to Corner Select Pin

for Filter A

25. OUT B

Filter B Output

26. GAIN A

Filter A, Gain Select Pin

27. PD B

Power Down, Filter B

28. FSEL B

Selects Filter

0 = Low Pass, 1 = Band Pass

MS2LFSS датащи(PDF) 3 Page - Mixed Signal Integration

MS2LFSS датащи(HTML) 3 Page - Mixed Signal Integration

Html Pages

1 2 3 4 5

датащи скачать

ссылки URL